-- G. Kemnitz: Technische Informatik 
-- Band 2: Entwurf digitaler Schaltungen
-- 1.3.5 Zusammenfassung und Uebungsaufgaben
--
-- Kontrolle der Lösung zu Aufgabe 1.12
---------------------------------------------------------------


library ieee;
use ieee.std_logic_1164.all;

entity AfgGlitch2 is end entity;
architecture a of AfgGlitch2 is
 signal x, z00, z0, z1, z11, z12, z13, z2, y: std_logic;
begin
 x <=  '0', '1' after 10 ns, '0' after 20 ns;
 z00 <= not x after 1 ns;
 z0  <= not z00 after 1 ns;
 z1  <= z0 xor x after 1 ns;
 z11 <= not z1 after 1 ns;
 z12 <= not z11 after 1 ns;
 z13 <= not z12 after 1 ns;
 z2  <= not z13 after 1 ns;
 y   <= z2 xor z1 after 1 ns;
end architecture;