-- G. Kemnitz: Technische Informatik 
-- Band 2: Entwurf digitaler Schaltungen
-- 2.2.6 Zusammenfassung und Uebungsaufgaben

--  Aufgabe 2.11 (Automatenentwurf)
---------------------------------------------------------------


library ieee;
use ieee.std_logic_1164.all;

library Tuc;
use Tuc.Ausgabe.all;
--use Tuc.Numeric_Sim.all;

entity LsgAutomat is
end entity;

architecture Sim of LsgAutomat is
begin

process
 variable s_next, s: std_logic_vector(2 downto 0);
 variable x, y: std_logic;
 constant e: std_logic_vector:="000011101101";
begin
  s_next:="000";

 for idx in e'range loop

  x := e(idx);
  s := s_next;

  s_next(0) := (s(2) and not s(1) and not x) or (s(0) and not x) 
            or (not s(2) and not s(0) and  x);
  s_next(1) := (not s(1) and not s(0) and not x) or (s(2) and not s(1))
            or (not s(1) and s(0) and x) or (s(1) and s(0) and not x)
            or (s(1) and not s(0) and x);
  s_next(2) := (s(2) and s(1)) or (s(2) and not s(1) and not x) 
            or (s(1) and not s(0) and not x);
  y := not s(1) and not x;

  write("s=" & str(s) & " x=" & str(x) & " s_next=" & str(s_next) &
        " y=" & str(y));
 end loop;
 wait;
end process;

end architecture;